Finishing up RS232 receive buffer : FPGA

60 BTC tip for VHDL ASIC working design

Continued from
You guys convinced me that the best way to achieve the goals stated in the previous post is to design the ASIC chip from scratch, or based on a FPGA VHDL design, instead of reverse engineering it.
Here is a reference to a relevant FPGA design opensource resource :
And also the original FPGA which the Avalon ASIC is the evolution for, and for which there are schematics and documentation available at :
So i'm offering a 100 BTC tip to anyone who can put out a VHDL Bitcoin miner working design conforming to the avalon specs at
Thank you in advance for your response! This is an amazing community!
EDIT Opensourcing the ASIC chip design is indeed something that will happen according to our roadmap and milestones reached. At any further revision of the chip the previous generation would be opensourced.
Added link to FPGA github resource mentioned in the comments.
Since i received several critics regarding the size of the tip/bounty, i have modified the amount a bit. Thank you!
submitted by whyasic to Bitcoin [link] [comments]

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AtomMiner AM01 FPGA? 17.5 Watts?

I want to give a shoutout to NotSoFast for tweeting about the FPGA's and also want to mention that my preorder is not like the preorder days of 2014 (i.e. Ti... To download and view our complete article go here: Using FPGA to mine on Auto Exchange Pools for Bitcoin - Duration: 7:10. Stephen Fitzgerald 188 views. 7:10 . Building the Perfect Squirrel Proof Bird Feeder - Duration: 21:40. Mark Rober ... This is the video showing the final project of EC551 in Spring semester,2015. This project, Bitcoin mining, is done by group "Bitminers". The group members a... What do you guys think about this little tiny AM01 FPGA - Check out my Red Panda Mining T-Shirt! -